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46 files • 85,534 KB
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A Gate Level Simulator for.pdf
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pdf
3,614 KB
3,614 KB
6 years ago
SHARATH KUMAR Y N
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A Survey on Fault Injection Techniques.pdf
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pdf
455 KB
455 KB
6 years ago
SHARATH KUMAR Y N
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A_model_for_transient_faults_in_logic_circuits.pdf
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pdf
194 KB
194 KB
6 years ago
SHARATH KUMAR Y N
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ALGORITHMS FOR.pdf
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pdf
16,073 KB
16,073 KB
6 years ago
SHARATH KUMAR Y N
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Asynchronous Transient Resilient Links for NoC.pdf
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pdf
429 KB
429 KB
6 years ago
SHARATH KUMAR Y N
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bastos2009.pdf
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pdf
230 KB
230 KB
6 years ago
SHARATH KUMAR Y N
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ComparisonSynchronous.pdf
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pdf
1,293 KB
1,293 KB
6 years ago
SHARATH KUMAR Y N
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Dependable-Computing-for-Critical-Applications-3.pdf
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pdf
13,108 KB
13,108 KB
6 years ago
SHARATH KUMAR Y N
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Designing Resistant Circuits against Malicious.pdf
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pdf
2,462 KB
2,462 KB
6 years ago
SHARATH KUMAR Y N
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Detection of Transient Faults in Nanometer Technologies.pdf
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pdf
1,127 KB
1,127 KB
6 years ago
SHARATH KUMAR Y N
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Dolores_A_Black.pdf
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pdf
5,421 KB
5,421 KB
6 years ago
SHARATH KUMAR Y N
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Error-Correcting.pdf
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pdf
8,598 KB
8,598 KB
6 years ago
SHARATH KUMAR Y N
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Evaluating Transient-Fault Effects on.pdf
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pdf
452 KB
452 KB
6 years ago
SHARATH KUMAR Y N
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Fault Detection and Test Minimization Methods for.pdf
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pdf
103 KB
103 KB
6 years ago
SHARATH KUMAR Y N
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FAULT TOLERANTASYNCHRONOUS.pdf
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pdf
1,297 KB
1,297 KB
6 years ago
SHARATH KUMAR Y N
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