4shared - extra by SHARATH KUMAR Y N

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A C-element Latch Scheme with Increased Transient Fault Tolerance for.pdf

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pdf

450 KB

SHARATH KUMAR Y N in extra

450 KB

6 years ago

SHARATH KUMAR Y N

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A Deductive Metkod ror Simulating Faults in Logic Circuits.pdf

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pdf

1,867 KB

SHARATH KUMAR Y N in extra

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6 years ago

SHARATH KUMAR Y N

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A Fault Tolerance Technique for Combinational and Sequential Circuits using Triple Modular Redundancy Technique.pdf

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411 KB

SHARATH KUMAR Y N in extra

411 KB

6 years ago

SHARATH KUMAR Y N

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A Survey on Fault Injection Techniques.pdf

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SHARATH KUMAR Y N in extra

455 KB

6 years ago

SHARATH KUMAR Y N

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ALGORITHMS FOR.pdf

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SHARATH KUMAR Y N in extra

16,073 KB

6 years ago

SHARATH KUMAR Y N

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Asynchronous Circuits Sensitivity to Fault Injection.pdf

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305 KB

SHARATH KUMAR Y N in extra

305 KB

6 years ago

SHARATH KUMAR Y N

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Asynchronous Transient Resilient Links for NoC.pdf

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429 KB

SHARATH KUMAR Y N in extra

429 KB

6 years ago

SHARATH KUMAR Y N

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bastos2009.pdf

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230 KB

SHARATH KUMAR Y N in extra

230 KB

6 years ago

SHARATH KUMAR Y N

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Dependable-Computing-for-Critical-Applications-3.pdf

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pdf

13,108 KB

SHARATH KUMAR Y N in extra

13,108 KB

6 years ago

SHARATH KUMAR Y N

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Design of Reliable Synchronous Sequential Circuits (2).pdf

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894 KB

SHARATH KUMAR Y N in extra

894 KB

6 years ago

SHARATH KUMAR Y N

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Design of Reliable Synchronous Sequential Circuits.pdf

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896 KB

SHARATH KUMAR Y N in extra

896 KB

6 years ago

SHARATH KUMAR Y N

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Designing Resistant Circuits against Malicious.pdf

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2,462 KB

SHARATH KUMAR Y N in extra

2,462 KB

6 years ago

SHARATH KUMAR Y N

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Dolores_A_Black (1).pdf

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5,421 KB

SHARATH KUMAR Y N in extra

5,421 KB

6 years ago

SHARATH KUMAR Y N

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Dolores_A_Black.pdf

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5,421 KB

SHARATH KUMAR Y N in extra

5,421 KB

6 years ago

SHARATH KUMAR Y N

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Error-Correcting.pdf

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8,598 KB

SHARATH KUMAR Y N in extra

8,598 KB

6 years ago

SHARATH KUMAR Y N

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Evaluating Transient-Fault Effects on.pdf

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452 KB

SHARATH KUMAR Y N in extra

452 KB

6 years ago

SHARATH KUMAR Y N

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Fault Detection and Test Minimization Methods for.pdf

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103 KB

SHARATH KUMAR Y N in extra

103 KB

6 years ago

SHARATH KUMAR Y N

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Fault Tolerant Design of Combinational and Sequential Logic.pdf

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259 KB

SHARATH KUMAR Y N in extra

259 KB

6 years ago

SHARATH KUMAR Y N

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FAULT TOLERANTASYNCHRONOUS.pdf

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1,297 KB

SHARATH KUMAR Y N in extra

1,297 KB

6 years ago

SHARATH KUMAR Y N

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Is Asynchronous Logic More Robust.pdf

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2,388 KB

SHARATH KUMAR Y N in extra

2,388 KB

6 years ago

SHARATH KUMAR Y N

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Logic Circuit Testing for Transient Faults (2).pdf

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202 KB

SHARATH KUMAR Y N in extra

202 KB

6 years ago

SHARATH KUMAR Y N

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mkb-dft-2003.pdf

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283 KB

SHARATH KUMAR Y N in extra

283 KB

6 years ago

SHARATH KUMAR Y N

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On-line testing of Globally Asynchronous circuits.pdf

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326 KB

SHARATH KUMAR Y N in extra

326 KB

6 years ago

SHARATH KUMAR Y N

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Soft_Error_Analysis_and_Optimizations_of_C-element.pdf

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399 KB

SHARATH KUMAR Y N in extra

399 KB

6 years ago

SHARATH KUMAR Y N

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Static-Analysis-15th-International-Symposium-SAS-2008-Valencia-Spain-July-16-18-2008-Proceedings.pdf

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pdf

8,390 KB

SHARATH KUMAR Y N in extra

8,390 KB

6 years ago

SHARATH KUMAR Y N

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Synthesis of Asynchronous Circuits for Stuck-At.pdf

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187 KB

SHARATH KUMAR Y N in extra

187 KB

6 years ago

SHARATH KUMAR Y N

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Time-Resolved Scanning of Integrated Circuits.pdf

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372 KB

SHARATH KUMAR Y N in extra

372 KB

6 years ago

SHARATH KUMAR Y N

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Tolerating Radiation-Induced Transient Faults.pdf

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656 KB

SHARATH KUMAR Y N in extra

656 KB

6 years ago

SHARATH KUMAR Y N